In this project I researched fault injection in FPGAs. My advisor was Professor Seda Memik. FPGAs (field programmable gate arrays) are integrated circuits, which are used in many modern electronics. Designing products with FPGAs is typically faster and cheaper than creating custom integrated circuits. Currently it's difficult to test the reliability of hardware designs when errors are caused by outside factors, such as radiation. The goal of this project was to design an error injection manager that could be connected to hardware designs, which would help in finding faults in the design.
Flip-flops are an essential part of embedded systems. They store a value, either 0 or 1 and can be updated every clock cycle. If the value stored in a flip-flop is inverted by radiation, this value would propagate through the rest of the system, causing errors in the output of the system. The module I created inverts the value of a random flip-flop at a random time. The module outputs exactly when and where it is injecting an error. The error injection manager also does a "golden run," which has the same inputs, but is free of any errors. This allows a programmer to see how an error injection run affects the output of their system, compared to a run free of errors. Using this information a programmer can improve the reliability of their embedded systems and mitigate the effects of internal errors on the output.
I wrote the code for this projects in VHDL and tested it on an Altera FPGA. The tested design needs to replace all of its flip-flops with "instrumented" flip-flops, which allow the error injection manager to flip the stored bit at any time. I connected the error injection manager to a 4-bit adder, to simulate the effect of randomly inverting flip-flops in the adder. In my simulations I observed that a random error injection resulted in the wrong output, whereas the golden run produced the correct output. The error injection manager could be connected to much larger designs to test their reliability.